OpenChipBench: A Homogeneous Cross-PDK PPA Benchmark Exposing the Mixing Bias in Power-Area Scaling

摘要: Objective. To determine whether pooling power–performance–area (PPA) data across heterogeneous process nodes — the de-facto practice in recent LLM- and GNN-based PPA prediction — distorts downstream scaling analysis.
Methods. We construct OpenChipBench, a homogeneous cross-PDK benchmark of 53 designs across six process nodes (7 nm to 180 nm, including a 2 nm platform), produced end-to-end by a single OpenROAD RTL-to-GDS flow with per-metric provenance. We fit a power-area scaling law P ∝ A^α under pooled and per-PDK strata, with leave-one-PDK-out (LOPO) sensitivity, and run a controlled cross-PDK generalization experiment with and without a supply-voltage physical prior.
Results. Pooled α = 0.528 (95% CI [0.364, 0.680]) vs. within-PDK α = 0.768–1.106; LOPO removing asap7 shifts α to 0.834. A single voltage feature restores within-PDK accuracy on a cross-PDK model (ihp-sg13g2: 18.4% vs. 16.2% MAPE); annotation granularity (core vs. I/O supply domain) is a second-order confounder.
Limitations. Sample size caps per-PDK analysis at n ≤ 16; a single physical prior does not close the cross-PDK gap on all PDKs; the 2 nm platform lacks power data in our toolchain.
Conclusions. PDK stratification and physical-prior annotation are infrastructure, not niceties, for cross-node PPA benchmarking; the cost of omitting them is quantifiable.