“韬（τ）定律”实现半导体领域新突破

2026年5月25日，华为公司董事、半导体业务部总裁何庭波在 ISCAS 2026 发表主旨演讲。

长期以来，半导体产业面临着晶体管“几何缩微”进程放缓、成本红利消退、传统工艺路径跨越难等困境，全球芯片行业迫切需要寻找新的可持续演进路径，以满足呈指数级增长的计算性能需求。“韬(τ)定律”的提出为攻克这一行业难题提供了有效解决方案。

2026年5月25日，华为公司董事、半导体业务部总裁何庭波在国际电路系统研讨会（ISCAS 2026）上发表题为《半导体新路径探索与实践》的主旨演讲，正式提出指导半导体产业发展的新原则——“韬（τ）定律”。该定律针对摩尔定律面临的物理极限和经济效益的双重挑战，创新性地以“时间（τ）缩微”替代“几何缩微”，通过逻辑折叠等创新技术持续压缩信号传播时延，提升晶体管密度，为半导体与电子系统的持续演进提供新路径。这是我国首次在全球半导体领域提出指导产业发展的新原则。

研究成果

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09-04

2026

V1 ChinaXiv:202609.00031

Huawei's τ Chip Was Supposed to Melt?

                            本版特点:
                            用麒麟2026在NPU、GPU、CPU上的等性能功耗与温度实测，专门讨论折叠硅的热管理问题。
                        

Heat is the sharpest concern on τ scaling law — the time-scaling principle behind Huawei’s folded silicon, named for the delay τ (“Tao”) it sets out to shrink. Our Kirin measurements turned that objection upside down. The reason is one every commuter already knows: on a chip, as in a workday, it is the travel that burns the majority of the energy, not the work at the desk.

Tingbo He · 电子与通信技术

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07-03

2026

V2 ChinaXiv:202605.00224V2

A time scaling theory for multi-layer electronic systems

                            本版特点:
                            补齐LogicFolding齿比与麒麟2026量产数据，并给出麒麟、昇腾后续工程路线。
                        

For six decades, Moore's geometric scaling drove progress in semiconductors. That industry compact no longer holds. This perspective argues for a successor scaling principle — τ scaling — that adopts time itself, rather than transistor area, as the primary metric of progress. On a mobile SoC, LogicFolding delivers a 55% step-wise increase in transistor density and a 41% power-efficiency gain at a fixed device node.

Tingbo He · 电子与通信技术

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05-25

2026

V1 ChinaXiv:202605.00224V1

A time scaling theory for multi-layer electronic systems

                            本版特点:
                            在ISCAS 2026提出τ缩放理论框架，以特征时间常数替代几何缩微，作为产业发展新原则。
                        

τ scaling is the first scaling principle since Dennard to give the whole computing stack one shared optimization target: shrink the delay τ. This ChinaXiv first release accompanies the ISCAS 2026 keynote Exploring and Practicing a New Semiconductor Path, replacing geometric shrink with time shrink.

Tingbo He · 电子与通信技术

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